Intel is working on developing its own version of stable cache technology, similar to AMD’s 3D V-Cache technology. However, this technology is still a few generations away from being implemented. During Intel CEO Pat Gelsinger’s Intel Innovation 2023 keynote, he addressed the question of whether Intel would adopt AMD’s stackable cache technology. Gelsinger explained that while Intel is not using the same technology as AMD, they are incorporating the concept of 3D silicon with cache on one die and CPU compute on a stacked die. This will be made possible using Intel’s embedded multi-die interconnect bridges (EMIB) and Foveros chiplet packaging technology.
Intel’s upcoming processor roadmap will heavily rely on the multi-chiplet module (MCM) design paradigm. This approach involves separating different processor components, such as the iGPU, cache, and neural processing unit, and bonding them together into a single unit. This departure from the traditional monolithic silicon fabrication allows for greater flexibility and opens up new possibilities for chip design.
One of the most significant advantages of the MCM design is the ability to incorporate stacked cache. This technology expands the available cache memory pool for the processor, resulting in much faster processing of specific CPU workloads. AMD has already demonstrated the benefits of stacked cache with its Ryzen 3D chips, which have shown improved performance compared to previous models.
Intel CEO Pat Gelsinger expressed confidence in Intel’s advanced capabilities for next-generation memory architectures. The company is well-positioned to leverage technologies like 3D stacking for both small and large packages, catering to AI applications and high-performance servers. These advancements will not only be utilized in Intel’s own products but also offered to Intel Foundry customers.
While stacked cache is an exciting prospect for future Intel processors, it is crucial to view it as just the beginning of new developments. Intel’s move towards MCM processor design using EMIB and Foveros chip packaging technology signifies a significant step forward. This approach will address the power consumption issues faced by previous Intel processors, making it a more sustainable long-term solution. As other industry leaders, like Nvidia, explore MCM designs, it is clear that this is a transformative direction for processor technology. Intel’s adoption of stackable cache technology should be seen as the start of a new era rather than the endgame.
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